BWDSP100 is a 32-bit static scalar Digital Signal Processor (DSP) with Very Long Instruction Word (VLIW) and Single Instruction Multiple Data (SIMD) features, which is designed for high-performance computing. Its Instruction Level Parallelism (ILP) is acquired though clustering and special SIMD instructions. However, the existing compiler framework can not provide support for these SIMD instructions. Since BWDSP100 has much SIMD vectorization resources and there are very high requirements in radar digital signal processing for the program performance, an SIMD optimization which surpported the selection of single or double word mode was put forward based on the traditional Open64 compiler according to the characteristics of BWDSP100 structure, and it can significantly improve the performance of some compute-intensive programs which are widely used in DSP field. The experimental results show that this algorithm can achieve speedup of 5.66 on average compared with before optimization.